Inverse design of ultra-compact photonic gates for all-optical logic operations

Neseli B., Yilmaz Y. A., Kurt H., Turduev M.

Journal of Physics D: Applied Physics, vol.55, no.21, 2022 (SCI-Expanded) identifier identifier

  • Publication Type: Article / Article
  • Volume: 55 Issue: 21
  • Publication Date: 2022
  • Doi Number: 10.1088/1361-6463/ac5660
  • Journal Name: Journal of Physics D: Applied Physics
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Academic Search Premier, Aerospace Database, Applied Science & Technology Source, Chemical Abstracts Core, Communication Abstracts, Compendex, Computer & Applied Sciences, INSPEC, Metadex, Civil Engineering Abstracts
  • Keywords: inverse design, all optical logic gates, optical power splitting, optimization, nanophotonics, WAVE-GUIDES
  • TED University Affiliated: Yes

Abstract

© 2022 IOP Publishing LtdLogic gates have great importance in realization of rapid data transmission as well as low loss transfers. In this paper, a multi-objective inverse-design approach is implemented by using objective-first algorithm to design optical AND, OR, NAND and NOT logic gates on Si-platform at the design wavelength of 1.30 μm. For all gates, the design area is fixed to 2.24 μm × 2.24 μm. The optical logic '1' output is accepted to be optical power values greater than 0.8 times of the input optical power. By implementing a Bias waveguide as well as two input ports, we made it possible to achieve logic '1' output for logic operations having no inputs such as '0 NAND 0 = 1' and '0 NOT = 1'. We binarized the proposed logic gates, and then numerically analyzed them by using finite-difference time-domain method. Proposed AND gate yields 1.20 times of input power for '1 AND 1 = 1' logic operation and highest logic '0' is obtained for logic operation of '1 AND 0 = 0' as 0.40 times of the input power at the operating wavelength. It is also observed that proposed logic gates can operate not only at the design wavelength of 1.30 μm but also at broad wavelength regions as well. Finally, we demonstrate that it is possible to carry out complex logic operations by combining the proposed logic AND, OR and NAND gates to construct an XOR gate in the same platform.